VHDL-based programming environment for Floating-Gate analog memory cell

Fernando Cardoso Castaldo, Carlos Alberto dos Reis Filho

Abstract


An implementation in CMOS technology of a Floating-Gate Analog Memory Cell and Programming Environment is presented. A digital closed-loop control compares a reference value set by user and the memory output and after cycling, the memory output is updated and the new value stored. The circuit can be used as analog trimming for VLSI applications where mechanical trimming associated with postprocessing chip is prohibitive due to high costs.


Keywords


Floating-Gate;Trimming; VHDL.



DOI: http://dx.doi.org/10.5433/1679-0375.2005v26n1p51

Creative Commons License
This work is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License.